Bus design parameter
1. Type : Dedicated or multiplexed
2. Arbitration : Centralized or distributed
3. Timing ; Synchronous or Asynchronus
4. Bus width ; Address or data
5. Data Transfer Type ; R, W, Read, Modify Write, after write, block
Bus Design Parameter in details
1. Bus Type :
i) Dedicated bus:
When a bus is permanently assigned only 1 functiion , it is called dedicated bus.
E.g. separate address and data lines separate bus for memory and I/O modules
Advantages: It gives high performance and less bus contention
Disadvantages : Increased size and cost.
ii) Multiplexed bus:
When the bus is used for more than 1 funcion in different time zones it is called multiplexed bus. E.g. 8085 microprocessor outputs A7- A0 in first clock cycles on pins. AD7 – AD0.
Advantages ; few pins lines are required . less cost and save space
Disadvantages: slow in speed
2. Bus Arbitration:
Several bus master connected to a common bus may require access to the same bus at the same time. A selection mechanism called bus arbitration describes which device should be given access to the bus
i) In Centralized approach; A hardware device called bus controller or bus arbiter allocates bus. It uses one of the following type
(1) Daisy chaining
(2) Polling
(3) Multiple priority levels
ii) In Distributed Approach: each master has arbiter compared to only single in centralized approach. Equal responsibility is given to all devices to carry out arbitration process, without using a central arbiter
3. Bus Timing: In synchronous timing ,e very event is synchronized by clock whereas in asynchronous every event occurring depends on previous events of bus .
4. Bus width: It decides the number of lines to be used for address and data. More addrss lines means more memory can be accessed e.g 16 line address make 2 16 = 64 kb , 20 address line makes 220 = 1 mb memory access .
More data lines means more number of bits can be transferred at a time. Therefore speed increases.
5. Data transfer type; A bus can support various type of data transfer
1) For multiplexed bus
a) Write operation : data is outputted immediately outputting address
b) Read operation: First address is outputted then sufficient acces s time is given gto address device to output data. Now data is read from bus
c) Read , modify write; Read data transfer is followed by write data transfer at the same address. It stop other cpu to use bus.
d) Read after write; Writer transfer is followed with read transfer after some access time . it is used for checking purpose.
e) Block operation; number of data are transferred at the same address one after another e.g. saving file in secondary storage.
2) For non-multiplexed bus :
Address and data outputted at the same time on different bus. It is faster system.
Showing posts with label bus design parameter. Show all posts
Showing posts with label bus design parameter. Show all posts
Wednesday, August 19, 2009
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